A growing need exists for hardware designs that can process data more rapidly, and for programming methods that can make optimal use of processor resources. This growing demand for processing speed is due, at least in part, to an expanding demand for “real time” computing devices, which are used in a wide variety of fields, such as telecommunications, entertainment, gaming, and other local and internet-driven applications.
Although general purpose processing “cores” used in computing devices have become faster and more efficient, it is difficult if not impossible for a single, general purpose processor, or “core,” to meet the computing needs of many real-time devices. Instead, “multi-core” processors are widely used for these applications. Some multi-core processors are highly flexible and adaptable, such as dual-core and quad-core general purpose processors used in personal computers, as well as other processors that include a plurality of general purpose cores. However, these designs are not practical for many real-time high-speed and/or low-power applications.
Other designs, such as pipeline processors and “field-programmable gate arrays” (FPGA's), include specialized cores that provide greater speed while retaining a certain degree of flexibility and adaptability. Still other designs include cores that are very fast but somewhat rigid in their applications, such as “digital signal processors” (DSP's) and “application-specific integrated circuits” (ASIC's).
In general, existing solutions offer a range of trade-offs between speed on the one hand and adaptability and flexibility on the other hand. Optimal device speed is generally achieved when the architecture of the processor is designed and configured specifically for the intended purpose, and the software is written to take maximum advantage of the specialized hardware. However, this approach does not allow for amortization of design costs over a plurality of different applications, nor does it provide for product evolution as new requirements are recognized and new applications are conceived. This approach is also problematic when the intended device is required to perform many different functions.
What is needed, therefore, is a multi-core processor design and a corresponding method of programming the processor that will provide high speed data processing while also being highly programmable and flexible for optimal use in multi-purpose devices and for adaptability as new requirements and new applications arise.